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Improved artificial digital neuron, neural network and network traning algorithm

机译:改进的人工数字神经元,神经网络和网络训练算法

摘要

The invention relates to an improved artificial digital neuron, an enhanced artificial neural network architecture together with a reduced training neural network training algorithm. The digital neuron comprises an n bit input one bit output device utilising a random access memory having 2" locations of one bit each. The neuron is programmed by the network training algorithm with the neuron fire state (on or off) in accordance with the synaptic weights allocated to the input code combination pattern for that neuron within the neural network. The digital neuron operates as a look-up table device deriving the neuron firing state, for each n bit digital code pattern applied to its input paths, from the random access memory location identified by the digital code pattern. The synaptic weights allocated to each digital code pattern for a particular neuron in the network cause the neuron to provide as an input correlation function or an interconnect function. The network architecture is based upon digital neurons providing either correlation or interconnection functions allowing a reduced interconnection arrangement where the output of each neuron in the input and hidden layers is connected only to an input path of a corresponding or immediately above or below neuron in the next layer. The training algorithm maps each pattern (as a function or interconnect) into neurons that lie on the path between a positive input (1) and the network output.
机译:本发明涉及一种改进的人工数字神经元,一种改进的人工神经网络架构以及一种简化的训练神经网络训练算法。数字神经元包括一个n位输入一比特输出设备,该设备利用一个具有2“位置各为一位的随机存取存储器。通过网络训练算法对神经元进行编程,并根据突触设置神经元的开火状态(开或关)。数字神经元充当查找表设备,从随机访问中获得每个输入到其输入路径的n位数字代码模式的神经元激发状态,该神经元作为查找表设备运行。由数字代码模式标识的存储位置,分配给网络中特定神经元的每个数字代码模式的突触权重使神经元提供作为输入相关函数或互连函数的网络架构基于数字神经元提供相关或互连功能允许减少互连安排,其中每个神经元的输出在输入端和隐藏端层仅连接到下一层中相应的神经元或紧接在其上方或下方的输入路径。训练算法将每个模式(作为函数或互连)映射到位于正输入(1)和网络输出之间的路径上的神经元。

著录项

  • 公开/公告号EP0560595A3

    专利类型

  • 公开/公告日1994-11-17

    原文格式PDF

  • 申请/专利权人 PILKINGTON MICRO-ELECTRONICS LIMITED;

    申请/专利号EP19930301830

  • 发明设计人 AUSTIN KENNETH;

    申请日1993-03-10

  • 分类号G06F15/80;

  • 国家 EP

  • 入库时间 2022-08-22 04:14:18

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