Processor responsive to environmental conditions to enable or disable a delay in a processing action

摘要

A processor includes logic circuitry (30) for producing output signals in response to input signal states from other circuitry (31), such input signal states subject to signal delays resulting from environmental conditions. The processor includes a wait state circuit (36) connected to the logic circuitry (30) for delaying operation of the logic circuitry (30) in response to the input signal states for a time period, the time period set in accordance with a worst case propagation delay of signals that give rise to the input states. A delay circuit (38) is responsive to environmental conditions for providing a delay indication if signal delays that result from the environmental conditions are less than a predetermined value. Further circuitry (40) is responsive to the delay indication to disable the wait state circuitry (36) so that the logic circuitry (30) operates in a more rapid manner. In one embodiment, the delay circuit (38) comprises a chain of circuits which feeds an edge triggered flip flop (40). In another embodiment, the delay circuit comprises a ring oscillator (70) whose output is compared with a known frequency (76) as a measure of signal propagation speed.