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Device for producing a test-compatible, largely fault tolerant configuration of redundantly implemented VLSI systems
Device for producing a test-compatible, largely fault tolerant configuration of redundantly implemented VLSI systems
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机译:用于产生冗余实现的VLSI系统的测试兼容,高度容错配置的设备
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摘要
A method and apparatus for the production of a test-compatible, largely defect-tolerant configuration of redundantly implemented, systolic VLSI systems. The method and apparatus for the configuration of redundantly implemented, systolic VLSI systems meets the conditions of defect-tolerance, test-compatibility and minimum hardware requirement. For this purpose, every module of the multi-dimensional systolic VLSI system has control logic allocated to it which controls A, B and C switches for the appertaining module. It is possible with the use of these switches to bridge a maximum of up to two faulty modules per row and one faulty module per column. A configuration algorithm provides a determination as to whether the established VLSI system is in the position to be able to execute the desired arithmetic operations.
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