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Memory module, parity bit emulator, and associated method for parity bit emulation
Memory module, parity bit emulator, and associated method for parity bit emulation
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机译:存储器模块,奇偶校验位仿真器以及用于奇偶校验位仿真的关联方法
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摘要
A memory module, parity bit emulator, and method which emulate storing and retrieving a parity bit from memory. The memory module includes a memory for storing a data word which is retrieved from the memory during the read cycle. The memory module also includes a parity bit emulator which includes a parity bit generator. The parity bit generator is responsive to the retrieved data word and generates in response a corresponding parity bit during the read cycle. The memory module also includes an input/output port for outputting the retrieved data word and the generated parity bit during the read cycle.
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