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Shift register with dual clock inputs for receiving and sending information between I/O channels and host based on external and internal clock inputs respectively
Shift register with dual clock inputs for receiving and sending information between I/O channels and host based on external and internal clock inputs respectively
A serial interface circuits internally provided in a microcomputer and including a shift register is provided with two sets of terminals, each set including a serial data input terminal, a serial data output terminal and a clock terminal, and the two sets of terminals am alternatively used by a serial channel selection flag. Thus, a multi- channel serial interface is realized.
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