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Event-driven signal processor interface having multiple paralleled microprocessor-controlled data processors for accurately receiving, timing and serially retransmitting asynchronous data with quickly variable data rates
Event-driven signal processor interface having multiple paralleled microprocessor-controlled data processors for accurately receiving, timing and serially retransmitting asynchronous data with quickly variable data rates
A hydrophone analog signal data acquisition, A/D conversion and data transsion system includes a first-stage signal processing subsystem which provides digital representations of the hydrophone analog signal which in turn are signal processed for transmission in the form of data packets by a second-stage signal processing subsystem (40). Subsystem (40) includes a plurality of signal processing units (48) having inputs coupled to a corresponding plurality of output channels of the first-stage signal process for receiving therefrom digital representations of hydrophone analog signals from different sources. Each of the signal processing units includes a first buffer (48-2), an identification of a hydrophone that generated the acoustic information, and a time that the acoustic information is received from the hydrophone. The system further includes a plurality of data processing units (52, 54) individually coupled to an output of the first buffer of one of the signal processing units. Each data processing unit operates an operating program to determine if a pulse characteristic (pulse width) of the acoustic information indicates that the acoustic information is associated with a valid pulse. Responsive to a determination that the acoustic information is associated with a valid pulse, the data processing unit operates to format the stored information into a data packet having a predetermined format for eventual bit serial transmission to a utilization device.
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