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Differential logic level translator circuit with dual output logic levels selectable by power connector options

机译:具有双输出逻辑电平的差分逻辑电平转换器电路,可通过电源连接器选项进行选择

摘要

Switching between two logic circuits that produce outputs at different respective logic levels is accomplished by means of a common input differential switch that has a branch in each logic circuit. A common current source supplies current to the branches within each logic circuit. The current source remains on regardless of which logic level is selected, thereby enhancing switching speed. The logic circuits produce logic outputs at a common output differential switch, which in turn provides a selected output to a single output terminal. The logic circuits are configured so that the output from the circuit corresponding to the selected logic level dominates the output from the other logic circuit at the output differential switch.
机译:借助于在每个逻辑电路中都有分支的公共输入差分开关,可以在产生不同逻辑电平输出的两个逻辑电路之间进行切换。公共电流源向每个逻辑电路内的分支提供电流。无论选择哪个逻辑电平,电流源都保持导通状态,从而提高了开关速度。逻辑电路在公共输出差分开关处产生逻辑输出,该输出又将选定的输出提供给单个输出端子。逻辑电路被配置为使得与所选逻辑电平相对应的电路的输出在输出差分开关处支配来自另一逻辑电路的输出。

著录项

  • 公开/公告号US5428305A

    专利类型

  • 公开/公告日1995-06-27

    原文格式PDF

  • 申请/专利权人 HUGHES AIRCRAFT COMPANY;

    申请/专利号US19930129939

  • 发明设计人 ERICK M. HIRATA;LLOYD F. LINDER;PUCK WONG;

    申请日1993-09-30

  • 分类号H03K19/018;H03K19/086;

  • 国家 US

  • 入库时间 2022-08-22 04:04:43

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