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deko - dadoraiba circuit

机译:装饰-达多赖巴赛道

摘要

PURPOSE:To apply a stable output voltage while suppressing the fluctuation of saturation voltage of an output transistor (TR) by operating independently each driver circuit to drive the output TR at a stable current at all times. CONSTITUTION:A base (base of a TR 6) is connected to an equivalent PNP TR (pseudo Darlington) comprising PNP TRs 6, 7 is connected to a bias circuit 29 formed by connecting a bias resistor 1 and the anode of a diode 5 and the other terminal of a bias resistor 1 is connected to the emitter of the equivalent PNP TR (connecting point of the emitter of the TR 6 and the collector of the TR 7) through a bias resistor 2. Thus, the base-emitter voltage of the TR 6 is subtracted from the potential of the bias circuit 29, and divided by the bias resistor 2 and supplied as nearly constant current as the driving current of the TR 8. Thus, the fluctuation of the saturation voltage of the output TR 8 is suppressed and the output voltage is made stable.
机译:目的:施加稳定的输出电压,同时通过独立操作每个驱动器电路以始终以稳定的电流驱动输出TR,从而抑制输出晶体管(TR)的饱和电压波动。组成:一个基极(TR 6的基极)连接到一个等效的PNP TR(伪达林顿),该PNP TRs包含PNP TR 6、7,它连接到一个偏置电路29,该偏置电路29通过连接偏置电阻1和二极管5的阳极而形成,偏置电阻器1的另一端通过偏置电阻器2连接到等效PNP TR的发射极(TR 6的发射极与TR 7的集电极的连接点)。因此,基极-发射极电压为TR 6从偏置电路29的电位中减去,并由偏置电阻2分压,并提供与TR 8的驱动电流几乎恒定的电流。因此,输出TR 8的饱和电压波动为抑制并稳定输出电压。

著录项

  • 公开/公告号JP2534713B2

    专利类型

  • 公开/公告日1996-09-18

    原文格式PDF

  • 申请/专利权人 NIPPON DENKI AISHII MAIKON SHISUTEMU KK;

    申请/专利号JP19870172157

  • 发明设计人 SAGARA KENICHI;

    申请日1987-07-09

  • 分类号H03K17/62;

  • 国家 JP

  • 入库时间 2022-08-22 03:59:22

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