NON-SCAN DESIGNING METHOD CONSIDERING TEST EASINESS FOR RT LEVEL DATA PATH CIRCUIT

摘要

PURPOSE:To facilitate the test of a circuit by making possible k-level control and/or observation by using the new EXUS graph expression of the circuit for a loop inside a data path. CONSTITUTION:As the data path at a register transfer(RT) level for a fourth- order IIR cascade filter, there are two adders A1 and A2, three multipliers M1, M2 and M3, 12 pieces of (trapezoidal) multiplexers and 12 pieces of (rectangular) registers. Several pieces of transfer units are provided and used for transferring data prepared by one time of repeated processing to a clock cycle in the next repeated processing. Thus, since one loop can be controlled and the other loop can be observed, the adoption of overlapped points to utilize the different control enable/observation enable levels of loops is specified. Further, any new algorithm is adopted so that the hardware required for controlling/ observing all the loops of the data path at a (k) level can be minimized.