INTEGER DATA PROCESSING CIRCUIT FOR GRAPHIC AND IMAGE PROCESSING,MULTIPLIER UNIT WITH PIPELINE,LOGICAL OPERATION UNIT AND SHIFT REGISTER UNIT

摘要

PURPOSE: To provide an integer data processing circuit especially for graphics. CONSTITUTION: The integer data processing circuit is provided with a multiplier 23 which multiplies the integer data word of eight bits or its multiple in which the word length can be controlled by adjusting it to multiplication that is to be executed in accordance with the multiple bits of eight for multiplication and whose part is constituted by a pipeline, an operational logic unit 31 executing an arithmetic operation on the integer data word of eight bits or a multiple bits of eight and at least two register units. Then, the register unit which temporarily stores the integer data word of a multiple bits of eight, which is to execute the operation, pipeline multiplication or both inside, and a bus structure 26 containing multiple buses and transferring the integer data word among a multiplier unit, the operational logic unit and the register unit are contained.