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Organization of an integrated cache unit for flexible usage in cache system design

机译:集成缓存单元的组织结构,可在缓存系统设计中灵活使用

摘要

Methods and apparatus are disclosed for realizing an integrated cache unit which may be flexibly used for cache system design. The preferred embodiment of the invention comprises both a cache memory and a cache controller on a single chip. In accordance with an alternative embodiment of the invention, the cache memory may be externally located. Flexible cache system design is achieved by the specification of desired cache features through the setting of appropriate cache option bits. The disclosed methods and apparatus support this user oriented approach to flexible system design. The actual setting of option bits may be peformed under software control and allows a high performance cache system to be designed with few parts, at low cost and with the ability to perform with high efficiency.
机译:公开了用于实现可以被灵活地用于高速缓存系统设计的集成高速缓存单元的方法和装置。本发明的优选实施例在单个芯片上包括高速缓冲存储器和高速缓存控制器。根据本发明的替代实施例,高速缓冲存储器可以位于外部。通过设置适当的缓存选项位来指定所需的缓存功能,可以实现灵活的缓存系统设计。所公开的方法和设备支持这种面向用户的方法来进行灵活的系统设计。选项位的实际设置可以在软件的控制下进行,并允许高性能的高速缓存系统以很少的零件,低成本和高效执行的能力进行设计。

著录项

  • 公开/公告号EP0325420B1

    专利类型

  • 公开/公告日1996-03-27

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号EP19890300433

  • 发明设计人 BAROR GIGY;

    申请日1989-01-18

  • 分类号G06F12/00;G06F12/08;

  • 国家 EP

  • 入库时间 2022-08-22 03:48:11

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