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METHOD FOR FORMING A VIRTUAL-GROUND FLASH EPROM ARRAY WITH FLOATING GATES THAT ARE SELF ALIGNED TO THE FIELD OXIDE REGIONS OF THE ARRAY WITH A FLOORING GATE SELTALLY ALIGNED IN THE FIELD OXIDE AREA OF THE ARRAY
METHOD FOR FORMING A VIRTUAL-GROUND FLASH EPROM ARRAY WITH FLOATING GATES THAT ARE SELF ALIGNED TO THE FIELD OXIDE REGIONS OF THE ARRAY WITH A FLOORING GATE SELTALLY ALIGNED IN THE FIELD OXIDE AREA OF THE ARRAY
A floating gate of a virtual ground flash programmable read only memory (EPROM) cell formed over a portion of a pair of vertically adjacent field oxide regions is formed by using a stacked etch process to define the width of the floating gate and field oxide regions, . As a result, the pitch of the cell in the X direction can be significantly reduced.
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