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INTERFACE UNIT OF ATM CELL ASSEMBLER AND 32BIT UNIT COMMUNICATION
INTERFACE UNIT OF ATM CELL ASSEMBLER AND 32BIT UNIT COMMUNICATION
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机译:ATM单元组件的接口单元和32位单元通信
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摘要
a pre-input/output buffer operated by the 9 bit for a connection between an ATM cell assembly and a module, the ATM cell assembly being used for performing an operation process of the bit unit; an ATM cell read signal generator for outputting a signal for reading an ATM cell to the pre-input/output buffer under provision with an output value from the counter; a unit converter for outputting a 32-bit data write signal, a unit conversion output signal, and a 32-bit output signal through inputs of the programmable almost empty signal from the pre-input/output buffer and the ATM cell read signal from the ATM cell read signal generator; first to fourth D flip-flops for outputting output data by 8 bit through inputs of the unit conversion output signal and the reset signal; a fifth D flip-flop for outputting data of 32 bit through inputs of the output data of 32 bit and the reset signal from outside; and a sixth flip-flop for outputting a start signal of 32 bit under input of an ATM cell output start signal from the pre-input/output buffer.
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