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Serial bus interfaces system for data transmission to a two-wire line as a clock bus and data bus.
Serial bus interfaces system for data transmission to a two-wire line as a clock bus and data bus.
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机译:串行总线接口系统,用于将数据传输到两线线路,作为时钟总线和数据总线。
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摘要
A serial data communication system is disclosed. This system includes a plurality of stations which are interconnected by a single clock wire and a single data wire. A master station in the stations includes a transistor push-pull circuit for driving the clock wire to output a clock signal on the clock wire. The clock signal thus has sharp leading and falling edges. The data wire is coupled to wire logic means. A transmitting station transmits each bit of a data signal on the data wire in synchronism with one of leading and falling edges of the associated clock pulse of the clock signal, and a receiving station receives each bit of the data signal in synchronism with the other of leading and falling edges of the associated clock pulse.
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