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FIFO buffer having write counter for generating empty flag value to be compared with read pointer value to indicate the buffer is full
FIFO buffer having write counter for generating empty flag value to be compared with read pointer value to indicate the buffer is full
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机译:具有写计数器的FIFO缓冲区,用于生成空标志值以与读指针值进行比较以指示缓冲区已满
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摘要
To support increased speed of the FIFO, a flag logic circuit is incorporated within the FIFO which asserts the full flag and the empty flag with minimal delay. The flag logic circuit is faster since delays due to comparison logic are eliminated by generating an internal full or empty signal before the FIFO actually becomes full or empty.
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