Branch prediction device enabling simultaneous access to a content- addressed memory for retrieval and registration

摘要

The branch prediction device of this invention is for use in a pipeline processor where a plurality of instructions are simultaneously processed in various stages, such as the fetch stage, execution stage, memory access stage and register write stage. A two-port branch prediction buffer enables simultaneous operation of the registration and retrieval processes so that a previously registered address can be obtained during the same clock pulse as registration of another branch address occurs.