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Series-gated emitter-coupled logic circuit providing closely spaced output voltages

机译:串联门极发射极耦合逻辑电路,提供紧密间隔的输出电压

摘要

An emitter-coupled logic circuit provides differential outputs which are delivered to pairs of transistors in emitter-coupled logic (ECL) switches. The differential outputs allow additional ECL switches to be connected between a positive and negative supply voltage. A unique current source for the ECL switches includes diodes and/or transistors connected in parallel with the ECL switches such that the supply current is relatively independent of fluctuations in the supply voltage and yet the voltage drop across the current source is minimized.
机译:发射极耦合逻辑电路提供差分输出,该差分输出被传送到发射极耦合逻辑(ECL)开关中的晶体管对。差分输出允许在正负电源电压之间连接额外的ECL开关。用于ECL开关的唯一电流源包括与ECL开关并联连接的二极管和/或晶体管,以使得电源电流相对独立于电源电压的波动,并且使电流源两端的电压降最小。

著录项

  • 公开/公告号US5508642A

    专利类型

  • 公开/公告日1996-04-16

    原文格式PDF

  • 申请/专利权人 NATIONAL SEMICONDUCTOR CORPORATION;

    申请/专利号US19950472071

  • 发明设计人 LOREN W. YEE;

    申请日1995-06-05

  • 分类号H03K19/086;H03K19/20;

  • 国家 US

  • 入库时间 2022-08-22 03:38:44

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