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Self-synchronizing scrambler/descrambler without error multiplication
Self-synchronizing scrambler/descrambler without error multiplication
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机译:自同步扰码器/解扰器,不带错误乘法
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摘要
A self-synchronizing scrambler/descrambler arrangement operates in two modes. In the first, or start-up mode, predetermined data is coupled to the scrambler and transmitted to the descrambler. This data is used to "seed", i.e., load, storage devices in the scrambler and descrambler with the same information. After a predetermined time interval, the start-up mode is terminated, and the scrambler and descrambler each operate in a steady-state mode. In this mode, the information loaded in the scrambler and descrambler devices are used to form the scrambler and descrambler key signals. Advantageously, in the steady-state mode, the occurrence of transmission errors does not effect the contents of the storage devices in the scrambler and descrambler. Hence, the prior art problem of error multiplication is avoided. In applications where a number of coded and multiplexed data channels are communicated over the communications channel linking the scrambler and descrambler, this approach allows the use of a single scrambler/descrambler without degrading the coding benefits.
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