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Noise suppression in large three state busses during test
Noise suppression in large three state busses during test
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机译:测试期间大型三态总线的噪声抑制
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摘要
A method for suppressing noise encountered during testing of large semiconductor chips is disclosed herein. Output drivers on the semiconductor chip may occasionally produce errant signals during testing, and such errant signals may be coupled through ground or nearby pins which are asynchronous edge sensitive pins to produce false internal transitions. The false internal transitions can cause the chip to fail the test. The proposed method suppresses the noise by disabling the output drivers during portions of the test which may induce errant signals and enables the output drivers when such potentially errant signals have passed.
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