Switched-capacitor one-bit digital-to-analog converter with low sensitivity to op-amp offset voltage

摘要

A switched-capacitor DAC system includes an integrator circuit including an op amp having an input lead, an output lead and an integrator capacitor connected between the input lead and the output lead. A sampling switch is operable to connect an input capacitor to be charged by an input voltage during at least one of first and second non- overlapping time intervals, wherein the first time interval is subdivided into first and second non-overlapping sub-intervals and the second time interval is subdivided into third and fourth non-overlapping sub- intervals. A transferring switch is operable to connect the input capacitor to transfer charge from the input capacitor to transfer charge from the input capacitor to the integrator capacitor during at least one of the first and third sub-intervals. A discharging switch is operable to connect the input capacitor to a discharge node during at least one of the second and fourth sub-intervals. In a preferred embodiment of the present invention, the sampling switch connects the input capacitor during one of the first and second sub-intervals, the transferring switch connects the input capacitor during one of the first and third sub- intervals, and the discharging switch connects the input capacitor during one of the second and fourth sub-intervals.