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NO-HIT SWITCHING DEVICE AND SWITCHING METHOD FOR DELAY PRIORITY CONTROL BUFFER

机译:延迟优先控制缓冲器的免命中切换装置和切换方法

摘要

PROBLEM TO BE SOLVED: To provide a no-hit switching device and switching method of a delay priority control butter for guaranteeing the accurate delay priority order of the output order of cells at the time of no-hit changeover. ;SOLUTION: This device is provided with an operation system buffer part 10 and a standby system buffer part 20. The operation system buffer part 10 is provided with plural priority buffers 11-1n and the respective priority buffers 11-1n are provided with a cell retaining amount computing circuit 115 for outputting retaining amount information signals for indicating the retaining of signal cells corresponding to the input of the cells for phase matching. The standby system butter part 20 is provided with the plural priority buffers 21-2n corresponding to the priority buffers 11-1n of the operation system buffer part 10 and the respective priority buffers 21-2n are provided with a read start address computing circuit 216 for controlling the read of the signal cells from the priority buffers 21-2n corresponding to the staying amount information signals outputted from the cell staying amount computing circuit 115 of the corresponding priority butters 11-1n.;COPYRIGHT: (C)1997,JPO
机译:解决的问题:提供一种延迟优先控制黄油的无命中切换装置和切换方法,以确保无命中转换时单元的输出顺序的准确的延迟优先顺序。 ;解决方案:该设备配备有操作系统缓冲部分10和备用系统缓冲部分20。操作系统缓冲部分10提供有多个优先级缓冲区11-1n,并且各个优先级缓冲区11-1n都具有一个单元。保持量计算电路115,用于输出保持量信息信号,该信号指示与相位匹配单元的输入相对应的信号单元的保持。备用系统黄油部分20设置有与操作系统缓冲器部分10的优先级缓冲器11-1n相对应的多个优先级缓冲器21-2n,并且各个优先级缓冲器21-2n设置有用于读取的开始地址计算电路216。控制从对应于优先权黄油11-1n的信元滞留量计算电路115输出的滞留量信息信号的优先级缓冲器21-2n中读出信号信元的方法;版权:(C)1997,JPO

著录项

  • 公开/公告号JPH09224039A

    专利类型

  • 公开/公告日1997-08-26

    原文格式PDF

  • 申请/专利权人 NEC CORP;

    申请/专利号JP19960053854

  • 发明设计人 IMAI KUNIHIRO;

    申请日1996-02-16

  • 分类号H04L12/28;H04Q3/00;

  • 国家 JP

  • 入库时间 2022-08-22 03:35:52

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