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High-performance computer system with fault-tolerant capability; method for operating such a system

机译:具有容错能力的高性能计算机系统;操作这样的系统的方法

摘要

A computer system in a fault-tolerant configuration employs multiple identical CPUs executing the same instruction stream, with multiple, identical memory modules in the address space of the CPUs storing duplicates of the same data. The multiple CPUs are loosely synchronized, as by detecting events such as memory references and stalling any CPU ahead of others until all execute the function simultaneously; interrupts can be synchronized by ensuring that all CPUs implement the interrupt at the same point in their instruction stream. Memory references via the separate CPU-to-memory busses are voted at the three separate ports of each of the memory modules. I/O functions are implemented using two identical I/O busses, each of which is separately coupled to only one of the memory modules. A number of I/O processors are coupled to both I/O busses. I/O devices are accessed through a pair of identical (redundant) I/O processors, but only one is designated to actively control a given device; in case of failure of one I/O processor, however, an I/O device can be accessed by the other one without system shutdown, i.e., by merely redesignating the addresses of the registers of the I/O device under instruction control.
机译:容错配置的计算机系统采用多个相同的CPU执行相同的指令流,在CPU的地址空间中具有多个相同的存储模块,这些模块存储相同数据的重复项。多个CPU松散地同步,例如通过检测诸如内存引用之类的事件并使任何一个CPU停滞不前,直到所有CPU同时执行该功能为止。通过确保所有CPU在其指令流中的同一点实现中断,可以使中断同步。通过单独的CPU到内存总线的内存引用在每个内存模块的三个单独的端口上进行表决。 I / O功能使用两条相同的I / O总线实现,每条总线分别单独耦合到一个存储模块。许多I / O处理器都耦合到两个I / O总线。 I / O设备通过一对相同的(冗余)I / O处理器进行访问,但是只有一个被指定为主动控制给定设备。但是,在一个I / O处理器发生故障的情况下,另一I / O设备可以访问而无需关闭系统,即仅通过在指令控制下重新指定I / O设备的寄存器地址即可。

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