Arithmetic unit and method for Fourier transform using a simplex arrangement of butterfly operation

摘要

A Fourier transform arithmetic unit is reduced in cost and size by simplifying the configuration of a butterfly operation device. Data corresponding to each of unit symbols is divided into first-half data and second-half data by a distribution switch. The first-half data is supplied to a delay circuit to be delayed by N/2. The data delayed by this delay circuit is again supplied to this delay circuit. The second-half data is supplied to another delay circuit to be delayed by N/2. The delayed data is again supplied to this delay circuit to be delayed. In this manner, the first-half data and the second-half data are supplied two times to input terminals of the butterfly operation device. The butterfly operation device performs one of two butterfly operations (addition) at the time of the first input and performs the other butterfly operation (subtraction) at the time of the second input. That is, the butterfly operation device performs the butterfly operations in a time division manner.