Lamp drive control circuit of inverter stand

摘要

The present invention uses a microcomputer, a logic element, and a predetermined time constant element to easily generate an oscillation period and duty ratio corresponding to a current illuminance setting signal and apply the same to a lamp driving inverter. It is to provide.;To this end, the present invention, in the inverter stand having an inverted lamp to operate, the microcomputer 30 for outputting the oscillation control signal and the duty ratio control signal based on the current illuminance setting signal, and the oscillation of the microcomputer 30 An oscillator 40 that variably outputs a predetermined oscillation frequency in accordance with a control signal, an oscillator 40 that variably outputs an oscillation frequency from the oscillator 40 according to the duty ratio control signal of the microcomputer 30, and the The duty ratio 50 of the oscillation frequency from the oscillator 40 is varied according to the duty ratio control signal of the microcomputer 30 and provided to the inverter. The oscillator 40 includes the microcomputer 30. Capacitors C1, C2, and C3 connected to the plurality of output ports port 2, 3, and 4, respectively, in parallel with each other, and a resistor R1 grounded to a common terminal of the capacitors C1, C2, and C3. And one input terminal to another output port (port 1) of the microcomputer 30. The other input terminal is connected to the output terminal of the first logical element 40a connected to the common terminal, the second logical element 40a is connected to a plurality of input terminals, the duty unit 50 is The second logic element 50a having a plurality of input terminals connected to the output terminal of the one logic element 40a and the plurality of output ports port 5, 6, 7 of the microcomputer 30 in parallel with each other. Capacitors C4, C5, and C6, each having a common terminal connected to the output side of the second logic element 50a, and one input terminal connected to the output terminal of the first logic element 40a, and the other input. The terminal consists of a third logic element 50b connected to the output terminal of the second logic element 50a via a resistor R2.