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Computation Circuit for Multichannel Data and Its Computation Method

机译:多通道数据的计算电路及其计算方法

摘要

The present invention relates to a calculation circuit and method for multichannel data applied to a correlation calculation unit for motion vector detection in a video signal processing or a circuit for processing a multichannel data such as an average value calculation in a digital signal processing.;The outputs of the previous stages are grouped into bits with the same unit to receive the least significant data (LSB) consisting of the least significant bits from the most significant data (MSB) consisting of the most significant bits and the high logical value of their respective data. It consists of a multi-step bit sum operation unit (110 ~ 130) consisting of a plurality of bit sum combination operators for counting the number of bits having a number, and the bit sum operation unit 110 of the first step of the multi-step bit sum operation unit ) Is the first least significant data composed of the least significant bits from the first least significant data (FMSB), which is composed of bits having the same unit among the M bits of each channel, N bits, which are N bits. And a plurality of bit sum combination operators 111 to 114 that receive the FLSB and count the number of bits having a high logical value of their respective data. The bit sum operation unit 130 of the last step of the sum sum operation units outputs the first and second data F1 and F2 composed of the least significant bit to the most significant bit, and outputs the first data F1 and the second data F2. And an adder 140 for adding the received result and outputting the calculation result data (O).
机译:本发明涉及一种用于多通道数据的计算电路和方法,该电路和方法被应用于在视频信号处理中用于运动矢量检测的相关性计算单元,或者在数字信号处理中用于处理诸如平均值计算之类的多通道数据的电路。前一级的输出被分组为具有相同单元的位,以接收由最高有效数据(MSB)组成的最低有效数据(LSB),最低有效数据由最高有效位及其各自的高逻辑值组成数据。它由一个多步位和运算单元(110〜130)组成,该单元由多个位和组合运算符组成,用于对具有一个数字的位数进行计数,并且该步骤的第一步是位和运算单元110步进比特和运算单元)是由第一最低有效数据(FMSB)中的最低有效比特组成的第一最低有效数据,它由每个通道的M个比特中N个比特, N位。以及多个位和组合运算器111至114,其接收FLSB并计数其各自数据的逻辑值高的位数。和和运算单元的最后一步的位和运算单元130将由最低有效位组成的第一数据F1和第二数据F2输出到最高有效位,并输出第一数据F1和第二数据F2。加法器140用于将接收到的结果相加并输出计算结果数据(O)。

著录项

  • 公开/公告号KR970049443A

    专利类型

  • 公开/公告日1997-07-29

    原文格式PDF

  • 申请/专利权人 김광호;

    申请/专利号KR19950047980

  • 发明设计人 박용철;

    申请日1995-12-08

  • 分类号G06F7/50;

  • 国家 KR

  • 入库时间 2022-08-22 03:16:45

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