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A method for calculating an average of four integers rounded from zero in a single instruction cycle and computing the average of the four integer numbers rounded away from a single instruction cycle.
A method for calculating an average of four integers rounded from zero in a single instruction cycle and computing the average of the four integer numbers rounded away from a single instruction cycle.
The present invention relates to an average calculation method for four integer arithmetic operations and an apparatus therefor, wherein four encoded or non-encoded n-bit integer arithmetic operations (A, B, C, D ) Provides four n + 2 bit extended operation numbers by adding two bits to the left of each operation number to provide an n + 2 bit sum by summing the extended operation numbers, and the n + Is calculated in a single instruction cycle by removing the two least significant bits of the 2-bit sum to provide an n-bit sum and appropriately increasing its n-bit sum. The adder circuit 302 adds 2 bits to the left of the number of operations and the expansion number is coupled to an adder circuit including an adder logic 308 and an n-bit carry lookhead adder 310. [ The adder logic 308 provides the adder 310 with two least significant bits of the sum of the number of extended operations with a partial sum of n bits and a partial carry of n bits. The adder 310 provides a sum output representing the most significant bit of the sum n of the number of extended operations and a sum + 1 output representing the sum output increased by one. Multiplexer 9314) receives the sum of the sum and the sum of the summation of the two least significant bits and the most significant bit of the sum of the number of extended operations and the sum 1 output as an n-bit average.
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