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adressing of microinstructions in a pipeline - central processing unit (operating method, the method of addressing, basement memory and central unit)
adressing of microinstructions in a pipeline - central processing unit (operating method, the method of addressing, basement memory and central unit)
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机译:管道中微指令的寻址-中央处理单元(操作方法,寻址方法,地下室存储器和中央单元)
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摘要
A memory stack used for storing microinstruction addresses in a pipelined CPU is constructed as a last-in, first-out memory using a stack pointer which applies a read control to one location of the stack and applies a write control to the next higher location. An unconditional read and write is done every machine cycle, before a microinstruction could be decoded, then the data on the read bus, or data from the write bus, is used and the pointer is incremented or decremented if a stack Push or Pop is decoded. These correspond to a Call or Return microinstruction. Thus the delay in decoding the microinstruction does not prevent completion of the stack operation in one machine cycle.
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