Inverse discrete cosine transform processor for VLSI implementation

摘要

A fast and efficient implementation of the inverse discrete cosine transform (IDCT). The disclosed IDCT processor achieves a good balance between efficient VLSI implementation and number of needed arithmetic operations and is thus particularly useful in real-time speech and video decompression applications. A standard IDCT computation is modified by factoring an IDCT formula into two parts: a prescaling of each input value followed by a multiplication with a matrix specially chosen so that the product will represent the IDCT of the input data. The premultiply constants are chosen so that the specially chosen matrix has a limited number of distinct values. The VLSI implementation of the matrix multiplication is thus greatly simplified.