Condition detector and prioritizer with associativity determination logic

摘要

A device for simultaneously detecting more than one condition, where each condition corresponds to a specific memory cell of an array of more than one memory cell, each specific memory cell of the array having a distinct index given by a first number of bits and a distinct associativity given by a second number of bits, each condition triggers a particular, distinct task, and each task, if more than one, is prioritized.