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Semiconductor integrated circuit device with test mode for testing CPU using external Signal
Semiconductor integrated circuit device with test mode for testing CPU using external Signal
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机译:具有测试模式的半导体集成电路器件,用于使用外部信号测试CPU
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摘要
An output gate means is provided which is capable of outputting individual signals selectively to an internal bus; the individual signals are interchanged among a plurality of functional modules connected to the internal bus which is interfaced with an external circuit. An input gate means is provided which is capable of supplying selectively a signal, input to the internal bus, to a specified functional module in place of an individual signal.
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