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Method and apparatus for switching between clock generators only when activity on a bus can be stopped
Method and apparatus for switching between clock generators only when activity on a bus can be stopped
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机译:仅当可以停止总线上的活动时才在时钟发生器之间切换的方法和装置
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摘要
Method and apparatus for providing a microprocessor with a divide by one frequency generator, while permitting the external clock driving the generator to vary in frequency without interruption of the operations of the microprocessor. A divide by two clock generator is also provided on the microprocessor chip. When a change in the frequency of the external clock is desired a request signal is provided to the chip. After a period of time has elapsed that permits the microprocessor to achieve a "safe" mode in which processing integrity is maintained even if the clock signal is interrupted, the divide by two clock generator is switched into operation. The external clock is then allowed to change frequency after which the divide by one clock generator is reactivated, following a period of time sufficient to allow the divide by one clock generator to stabilize.
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