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Failure detection system for detecting failure of functional blocks of integrated circuits

机译:用于检测集成电路功能块故障的故障检测系统

摘要

A detection unit (46) detects an input pattern stored in an input pattern storage (45) corresponding to a signal inputted to a random logic unit (2). An expected pattern responsive to the input pattern detected by the detection unit (46) is transmitted from the expected pattern storage (52) to a comparator (6). The comparator (6) compares an output from the random logic unit (2) with the expected pattern, and then an error processing circuit (7) processes the comparison result. The error processing circuit (7) stores the details of the error in an error register (8), and makes the data in the register (8) transmittable through a data bus (34) to the outside of a failure detection circuit (101b). The information concerning the error is processed statistically and the data stored in the input pattern storage (45) and expected pattern storage (52) are properly rewritten, so that an improvement in failure detection ration can be achieved.
机译:检测单元(46)检测与输入到随机逻辑单元(2)的信号相对应的,存储在输入模式存储器(45)中的输入模式。响应于由检测单元(46)检测到的输入模式的期望模式被从期望模式存储器(52)发送到比较器(6)。比较器(6)将来自随机逻辑单元(2)的输出与期望模式进行比较,然后由误差处理电路(7)处理比较结果。错误处理电路(7)将错误的细节存储在错误寄存器(8)中,并使寄存器(8)中的数据可通过数据总线(34)传输到故障检测电路(101b)的外部。 。对与错误有关的信息进行统计处理,并且适当地重写存储在输入模式存储器(45)和期望模式存储器(52)中的数据,从而可以提高故障检测率。

著录项

  • 公开/公告号US5617429A

    专利类型

  • 公开/公告日1997-04-01

    原文格式PDF

  • 申请/专利权人 MITSUBISHI DENKI KABUSHIKI KAISHA;

    申请/专利号US19940291751

  • 发明设计人 KOUJI GOTO;

    申请日1994-08-16

  • 分类号G06F11/26;

  • 国家 US

  • 入库时间 2022-08-22 03:10:18

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