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Method and apparatus for presenting an access request from a computer system bus to a system resource with reduced latency

机译:用于以减少的等待时间呈现从计算机系统总线到系统资源的访问请求的方法和装置

摘要

A system has a system resource, such as a frame buffer, coupled to a system bus, the system bus conveying a request for access to the system resource from another system element connected to the system bus. An apparatus for presenting the access request to the system resource from the system bus includes a queue, a multiplexor that is preferably glitchless, and a controller. The queue has an input for receiving access request information from the system bus; one or more storage elements, each for storing access request information, wherein the one or more storage means are connected to form a queue having a head and a tail; and a queue output for supplying data stored in the head of the queue. The multiplexor has a first input coupled to the queue output, a second input for receiving the access request information from the system bus, and a multiplexor output for supplying the access request to the system resource. The controller is coupled to the queue and to the multiplexor, for initiating the loading of the access request information into the queue, and for initially causing the multiplexor to supply, at the multiplexor output, the access request information from the second input, and for subsequently causing, after the access request information becomes available at the queue output, the multiplexor to supply, at the multiplexor output, the access request information from the first input. This configuration reduces latency on read operations to the frame buffer.
机译:系统具有耦合至系统总线的系统资源,例如帧缓冲器,该系统总线传达从连接至系统总线的另一系统元件访问系统资源的请求。用于从系统总线向系统资源呈现访问请求的设备包括队列,优选无故障的多路复用器和控制器。队列有一个输入,用于从系统总线接收访问请求信息;一个或多个存储元件,每个用于存储访问请求信息,其中,一个或多个存储装置被连接以形成具有头部和尾部的队列;队列输出用于提供存储在队列头部的数据。复用器具有耦合到队列输出的第一输入,用于从系统总线接收访问请求信息的第二输入,以及用于将访问请求提供给系统资源的复用器输出。控制器耦合到队列和多路复用器,用于启动将访问请求信息加载到队列中,并最初使多路复用器在多路复用器输出处提供来自第二输入的访问请求信息,并且用于随后在访问请求信息在队列输出处变得可用之后,使多路复用器在多路复用器输出处提供来自第一输入的访问请求信息。此配置减少了对帧缓冲区的读取操作的延迟。

著录项

  • 公开/公告号US5625778A

    专利类型

  • 公开/公告日1997-04-29

    原文格式PDF

  • 申请/专利权人 APPLE COMPUTER INC.;

    申请/专利号US19950434193

  • 发明设计人 BRIAN A. CHILDERS;ERIC A. BADEN;

    申请日1995-05-03

  • 分类号G06F13/14;

  • 国家 US

  • 入库时间 2022-08-22 03:10:12

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