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Pipeline data processor with arithmetic/logic unit capable of performing different kinds of calculations in a pipeline stage
Pipeline data processor with arithmetic/logic unit capable of performing different kinds of calculations in a pipeline stage
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机译:具有算术/逻辑单元的管道数据处理器,能够在管道阶段执行各种计算
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摘要
The data processors of the present invention transfer the contents of address registers and program registers through an unused bus during the cycle of writing into registers and execute, in one cycle, a load instruction or a store instruction that requires address calculation, although the processors have two buses and one arithmetic/logic unit. Also, the data processors assign basic arithmetic instructions between registers and load/store instructions instruction codes having a basic instruction word length of one byte by functionally dividing general purpose-registers into four address registers and four data registers.
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