Hierarchical fat hypercube architecture for parallel processing systems

摘要

A hierarchical fat hypercube topology provides an infrastructure for implementing a multi-processor system at a plurality of levels. A first level is comprised of a plurality of n-dimensional hypercubes. This plurality of n-dimensional hypercubes is interconnected at a second level utilizing an m-dimensional metacube. The number of dimensions at each level and the number of bristles at each level can be customized depending on the requirements of the application. Additionally, routers can be implemented such that the system can be expanded to meet increasing system requirements. This is particularly useful at the second level of the hierarchical topology.