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SCRAMBLE CANCEL DEVICE FOR SECURITY ELEMENT AND SECURITY ELEMENT CONSISTING OF THE CANCEL DEVICE

机译:用于安全元素的可伸缩取消设备和包括该取消设备的安全元素

摘要

PROBLEM TO BE SOLVED: To decrease the dissipated electric power by producing a combination of data synchronously with a clock signal, consisting of a specific frequency and then dividing the combination of data that canceled the scramble into sub-combinations, synchronized with another clock signal having the same frequency. ;SOLUTION: A signal VE, produced from the video data which should cancel the scramble and a clock signal CLK, synchronized with the frequency set, when the bits are accumulated in a deserializer 3 are supplied to the deserializer 3. The groups of (n) bits collected at the deserializer 3 form a combination C3 of (n) pieces of parallel bits, and a clock signal CL1 having the frequency, i.e., a fraction of the frequency of the signal CLK shifts the combination C3 between the stages of a memory 4. Then combination of data which canceled the scramble, that is generated from a scramble cancel circuit 5, is divided into sub-combinations synchronized with a clock signal CL2 having the same frequency as the signal CL1.;COPYRIGHT: (C)1998,JPO
机译:解决的问题:通过与时钟信号同步产生数据组合(由特定频率组成),然后将抵消加扰的数据组合划分为子组合,再与另一个具有相同的频率。 ;解决方案:当在解串器3中累积了这些位时,由视频数据产生的信号VE将与设置的频率同步,该视频应消除扰码,并且时钟信号CLK与设置的频率同步被提供给解串器3。 )在解串器3处收集的比特形成(n)个并行比特的组合C3,并且具有该频率(即,信号CLK的频率的一部分)的时钟信号CL1在存储器的各级之间移动该组合C3 4.然后,将由加扰消除电路5生成的,消除了加扰的数据的组合分成与时钟信号CL2同步的子组合,该时钟信号CL2具有与信号CL1相同的频率。(版权)(C)1998,日本特许厅

著录项

  • 公开/公告号JPH10262042A

    专利类型

  • 公开/公告日1998-09-29

    原文格式PDF

  • 申请/专利权人 THOMSON MULTIMEDIA SA;

    申请/专利号JP19980023299

  • 发明设计人 PRUNIER JACQUES;

    申请日1998-02-04

  • 分类号H04L9/20;H04N7/167;

  • 国家 JP

  • 入库时间 2022-08-22 03:06:57

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