DATA READ OUT CIRCUIT FOR ASYNCHRONOUS ROM

摘要

PROBLEM TO BE SOLVED: To provide a data read out circuit for asynchronous ROM having a low power consumption. ;SOLUTION: A potential source Vdd to give an 'H' potential corresponding to logic 'H' is grounded through P type FETs 7, 11 connected in parallel, a node (a), an N type FET 6, a bit line 1, and an N type FET 4 of a memory cell M1. At first, the P type FET 7 is turned on by trigger pulse signals for a short time to give an 'H' potential to the node (a). Consequently, a data 'L' is outputted from an inverter 8 and the P type FET 11 is turned on to apply the 'H' potential continuously to the node (a). When the N type FETs 4, 6 are turned on in that state, a DC current flows between the memory cell M1 and the P type FET 11. Consequently, the bit line 1 has the 'L' potential and the inverter 8 output a data 'H' and then the P type FET 11 is turned off to interrupt DC current supply.;COPYRIGHT: (C)1998,JPO