MULTI-PORT MEMORY CELL WITH PARALLEL DATA INITIALIZING FUNCTION, STORAGE WITH IT AND MULTI-PORT MEMORY CIRCUIT WITH PARALLEL DATA INITIALIZING FUNCTION

摘要

PROBLEM TO BE SOLVED: To perform initial operation of a memory in one cycle at high speed in a multi-port memory cell by providing reset means in respective cells and simultaneously resetting all cells with a reset signal. ;SOLUTION: A reset circuit 160 contains an NMOS transistor M10 connected between a node Nd1 and an initialization voltage Vs to transmit the initialization voltage Vs to a first node Nd1 by the reset signal CTL. The reset circuits 160 are provided in respective memory cells, and the reset signal CTL is impressed simultaneously to all reset circuits, and all memory cells are reset simultaneously, and the initial data instructed by the voltage Vs are stored. In this triple port static RAM cell, the reset circuit is connected to a write-in port additively, and thus, the initial data are written in all memory cells in one cycle independent of a write-in bus, and the initial operation of the memory is performed in one cycle at high speed.;COPYRIGHT: (C)1998,JPO