ADDRESS GENERATOR FOR GENERATING ADDRESSES USED FOR ZIGZAG SCAN OF CONTENTS OF MEMORY ARRAY

摘要

PROBLEM TO BE SOLVED: To provide a low-cost and high-efficiency address generator which is used for a zigzag and a block scan. ;SOLUTION: A control unit 1 includes an up/down counter which is driven with a clock so as to generate a varying output, an increment counter which generates an increment output, and a comparator which generates a comparison output between the varying output and increment output. An address generation unit 2 has a 1st register means used to store an initial address and a 2nd register means which stores step-size values and one of the step-size values is outputted according to a combination of the comparison output and the least significant digit bit of the varying output and an adding means for generates a new address which is equal to the sum of the initial address and step-size value. The up/down counter is so controlled as to replace the contents of the 1st register means with the new initial address.;COPYRIGHT: (C)1997,JPO