Microcomputer with development support function

摘要

A data processing apparatus comprising an integrated circuit 2 having a processor core 4 surrounded by a scan chain 10 is described. The processor core 4 can execute program instructions using either a system clock signal MClk or a test clock signal DClk. A clock selecting bit S within the program instructions for test operation indicates which clock is to be used and a clock selecting mechanism 12, 14 selects the indicated clock signal and passes this to the processor core 4. When the system clock MClk is selected execution of the program instruction by the processor core 4 may be coordinated with the operation of connected auxiliary circuits such as a DRAM 6.