首页> 外国专利> METHOD AND APPARATUS FOR PROTECTING MEMORY-MAPPED DEVICES FROM SIDE EFFECTS OF SPECULATIVE INSTRUCTIONS

METHOD AND APPARATUS FOR PROTECTING MEMORY-MAPPED DEVICES FROM SIDE EFFECTS OF SPECULATIVE INSTRUCTIONS

机译:从专用指令的副作用保护内存映射设备的方法和装置

摘要

A computer system includes a CPU for executing conventional instructions and speculative instructions, and a memory controller coupled to a system bus. In response to an access operation by one of the instructions, the CPU generates a speculative instruction bit and a corresponding access address. The access address represents a location in a global address space which includes a first address space and a second address space. The speculative instruction bit is asserted when the corresponding access address is generated by a speculative instruction. The memory controller discards the access operation when the speculative instruction bit is asserted and the access address is in the second address space. Thus, the speculative instruction is prevented from accessing the second address space. In one embodiment, the computer system includes a memory coupled to the system bus and mapped to the first address space, and an I/O device coupled to the system bus and mapped to the second address space. The speculative instruction is prevented from accessing the I/O device.
机译:一种计算机系统,包括:用于执行常规指令和推测指令的CPU;以及耦合至系统总线的存储器控​​制器。响应于指令之一的访问操作,CPU生成推测指令位和相应的访问地址。访问地址表示全局地址空间中的位置,该全局地址空间包括第一地址空间和第二地址空间。当推测指令产生相应的访问地址时,推测指令位被置位。当推测指令位被断言并且访问地址在第二地址空间中时,存储器控制器放弃访问操作。因此,防止了推测指令访问第二地址空间。在一个实施例中,计算机系统包括耦合到系统总线并映射到第一地址空间的存储器,以及耦合到系统总线并映射到第二地址空间的I / O设备。阻止推测性指令访问I / O设备。

著录项

  • 公开/公告号WO9827485A1

    专利类型

  • 公开/公告日1998-06-25

    原文格式PDF

  • 申请/专利权人 HEWLETT-PACKARD COMPANY;

    申请/专利号WO1997US22643

  • 发明设计人 FARABOSCHI PAOLO;SUCH-VICENTE ALBERTO;

    申请日1997-12-12

  • 分类号G06F9/38;G06F12/14;

  • 国家 WO

  • 入库时间 2022-08-22 02:51:35

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号