according to the invention, the shift register (15) to 4 in order to save the digital samples of the digital phase detector in order to. the shift register (15) of the digital sample clock frequency of occurrence in a binary value. the digital phase detector is a value in the shift register in each of the two samples to be don't know. each of the samples of the actual value and the measurement value is corrected signal (20, 21) when used. in the middle of the two samples in the digital signal samples to the next occurrence of the control clock to record the occurrence of a loop in the phase voltage of the generator system. phase and frequency control, and can be used to form the correction signal to the adder ( the 22).
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