The adder circuit used optimally for multiplication operation on the Galois field

摘要

More particularly, to a configuration of an adder circuit having a structure that can be efficiently used in a multiplication circuit on a Galois field. The addition circuit includes first and second input terminals capable of inputting m-bit signals, an output terminal capable of outputting an m-bit signal, a carry input capable of inputting and outputting a 1-bit signal, An m-bit decimal adder for adding a signal input to the first and second input terminals to output to the output terminal and for outputting a carry signal to a carry output terminal when the added result exceeds m bits; And a combinational circuit connected between a carry output terminal and a carry input terminal of the m-bit decimal adder and transmitting the generated carry signal to the carry input terminal in response to activation of a control clock for input control to a multiplication operator, do.