首页> 外国专利> the memory mapping circuit, system and method for use with the display control system (CIRCUITS, SYSTEMS and METHOOS free on rail MEMORY MAPPING and DISPLAY CONTROL SYSTEMS USING THE SAME)

the memory mapping circuit, system and method for use with the display control system (CIRCUITS, SYSTEMS and METHOOS free on rail MEMORY MAPPING and DISPLAY CONTROL SYSTEMS USING THE SAME)

机译:与显示控制系统一起使用的存储器映射电路,系统和方法(使用相同的电路,系统和轨道上的免费内存映射和显示控制系统)

摘要

the system (100) for the system (101) and the host system bus, with the combination of the 102), and buses (102) is the combination of the interface circuit (106), including the opening. the bus interface (106) is one of the first bus interface is also the option of the mapping signal input and the signal output of the graph. the bus interface (106) in the (101) from a mapping signal input from the selected mapping is in response to the signal on the system bus, on the plane of the at least one of the first selected address to the call to action. .the second bus interface (106) of the bus (102) bond. the first bus interface (106) dml mapping signal output is combined in the mapping signal input to provide a second bus, and the interface (106) through the first bus interface (106) from table for the second bus interface (106) with the mapping from the input of the second mapping of the signal in response to this, the bus (102) with the host (101) of the at least one of the two selected you to dress in the can.
机译:用于系统(101)的系统(100)和主机系统总线(具有102)的组合,而总线(102)是接口电路(106)的组合,包括开口。总线接口(106)是第一总线接口之一,也是图的映射信号输入和信号输出的选项。 (101)中从选定映射输入的映射信号中的总线接口(106)响应于系统总线上的信号,在至少一个第一个选定地址的平面上发出号召性用语。总线(102)的第二总线接口(106)连接。第一总线接口(106)的dml映射信号输出在映射信号输入中被组合以提供第二总线,并且接口(106)通过第一总线接口(106)从表中获得第二总线接口(106)与响应于此,从信号的第二映射的输入的映射开始,总线(102)与至少两个选择的主机(101)的主机(101)一起装在罐中。

著录项

  • 公开/公告号KR19980700632A

    专利类型

  • 公开/公告日1998-03-30

    原文格式PDF

  • 申请/专利权人 로버트 에프. 도너후;

    申请/专利号KR19970703465

  • 发明设计人 테이러 로날드 티.;

    申请日1997-05-23

  • 分类号G09G5/00;

  • 国家 KR

  • 入库时间 2022-08-22 02:45:26

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