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PROCEDURES AND PREPARATION FOR THE COMPARISON OF THE SPANISH DISTRIBUTION OF SERIES, GATED HALF-LEADERS

机译:西班牙系列的门,半门的比较的程序和准备

摘要

The invention relates to a process and a device (14) for equalising the voltage distribution to gate-controlled, series-connected semiconductors (2). According to the invention, in the on-conditon, predetermined switch-off delays are called depending on the measured value of a load current (iL) and said delays are updated following switch-off depending on a wrong-voltage distribution found. This provides a process and a device (14) for equalising the voltage distribution to gate-controlled, series-connected semiconductors (2), the regulation being always automatically performed according to the latest operating status.
机译:本发明涉及一种用于均衡到栅极控制的,串联连接的半导体(2)的电压分布的方法和装置(14)。根据本发明,在接通条件下,根据负载电流(iL)的测量值调用预定的关闭延迟,并且在关闭之后根据发现的错误电压分布来更新所述延迟。这提供了用于均衡到栅极控制的,串联连接的半导体(2)的电压分布的过程和装置(14),该调节总是根据最新的操作状态自动执行。

著录项

  • 公开/公告号DE59501290D1

    专利类型

  • 公开/公告日1998-02-19

    原文格式PDF

  • 申请/专利权人 SIEMENS AG 80333 MUENCHEN DE;

    申请/专利号DE19955001290T

  • 发明设计人 BAKRAN MARK-MATTHIAS D-64668 RIMBACH DE;

    申请日1995-03-03

  • 分类号H03K17/08;H03K17/10;H03K17/732;H02M1/088;

  • 国家 DE

  • 入库时间 2022-08-22 02:43:11

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