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Counter switching using a Johnson-type counter and using the Johnson-type counter

机译:使用Johnson型计数器和Johnson型计数器进行计数器切换

摘要

A counter circuit includes Johnson-type counters (JC1 SIMILAR JCm) of m stages, each counter including a plurality of flip-flops (FF11 SIMILAR FF1N1,FF21 SIMILAR FF2N2,... ..., FFm1 SIMILAR FFmNm) connected in a cascade connection, each flip-flop receiving a clock signal (CLK) at a respective clock input end (C). In the constitution, signals at respective output ends (Q) of flip-flops in a (k-1)-th stage counter are simultaneously input to respective clock input ends (C) of flip-flops in each counter of a k-th stage and more. As a result, it is possible to obtain a signal having an arbitrary ratio of freguency division with high speed, while relatively simplifying the circuit constitution. IMAGE
机译:计数器电路包括m级的约翰逊型计数器(JC1〜JCm),每个计数器包括多个触发器(FF11〜FF1N <1>,FF21〜FF2N <2>,...,FFm1〜 FFmNm)级联连接,每个触发器在各自的时钟输入端(C)接收时钟信号(CLK)。在该结构中,第(k-1)级计数器中的触发器的各个输出端(Q)处的信号被同时输入到第k个计数器中的触发器的各个时钟输入端(C)。舞台等等。结果,可以高速获得具有任意比例的频率分割的信号,同时相对简化电路结构。 <图像>

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