Descrambling DVB data according to ETSI common scrambling standard

摘要

In order to implement the Digital Video Broadcasting descrambling algorithm in the context of MPEG compressed data streams containing interleaved sections of scrambled and unscrambled data, at a data rate of 60MBits/sec with a clock of 27MHz, a stream cipher has an input to receive scrambled video data, and an output coupled to a block cipher for providing descrambled data. The stream cipher comprises shift register 40 means for holding input data coupled to a first mapping logic mechanism 42 comprising at least a first logic means 44 and a second logic means 46 coupled in sequence and arranged to carry out similar logical steps. The block cipher means (Fig 5) comprising shift register means 50 for holding the output of the stream cipher means and a second logic mapping mechanism 52, comprising at least a first logic means 54, a second logic means 56, a third logic means 58 and a fourth logic means 60 coupled in sequence being arranged to carry out similar logical steps.