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Semiconductor memory wherein metallic interconnection layer is applied with the same potential as word line and is connected to word line in regions other than memory cells
Semiconductor memory wherein metallic interconnection layer is applied with the same potential as word line and is connected to word line in regions other than memory cells
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机译:半导体存储器,其中金属互连层被施加与字线相同的电位,并在除存储单元以外的区域中连接到字线
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摘要
Memory cells, which serve as basic cells, are arranged in a matrix pattern. The memory cells are each provided with a word line which is integral with the gate electrode of a switch element and which is formed of polysilicon. A metallic interconnection layer is arranged above the word line and is applied with substantially the same potential as the word line. The metallic interconnection layer and the word line are connected together via through-holes. The through-holes are formed in through-hole cells, which also serve as basic cells. The through-hole cells and the memory cells are arranged such that the number of rows of the former and the number of rows of the latter are in the ratio of one to at least two.
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