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Parallel interface circuit having a n-byte buffer and tansmitting the n byte data on a byte-by-byte basis in response to interrupt request signal
Parallel interface circuit having a n-byte buffer and tansmitting the n byte data on a byte-by-byte basis in response to interrupt request signal
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机译:并行接口电路,具有一个n字节的缓冲区,并响应中断请求信号逐字节地传输n字节的数据
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摘要
An n-byte buffer is able to store n bytes of data. A interrupt request signal generating circuit interrupts the processor of the peripheral apparatus after receiving the nth byte of the data. Accordingly, only one interrupt operation is needed to receive and input n bytes of data. Consequently, the number of interrupt operations is reduced and the data processing speed is improved.
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