Method and apparatus for allowing multi-speed synchronous communications between a processor and both slow and fast computing devices

摘要

An improved data processing system includes a number of components which cooperate together. A synchronous data bus is provided for communicating data. A central processing unit is provided for executing program instructions. The central processing unit is communicatively connected to the synchronous data bus. At least one memory is provided for storing at least one of programming instructions and digital data. The memory is communicatively connected to the central processing unit. A data processing device is provided which is communicatively connected to the synchronous data bus. At least one data processing device includes at least one fast data processing device and at least one slow data processing device. The fast data processing device is capable of communicating data at a faster rate than the slow data processing device. In accordance with the present invention, the improved data processing system is operable in a plurality of modes of operations, including a fast mode of operation and a slow mode of operation. During the fast mode of operation, at least one fast data processing device communicates data over the synchronous data bus at a relatively high rate of speed, while the data bus arbiter restricts the slow data processing device from accessing the synchronous data bus.